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Jul 23 2018

WD and Toshiba to Ship Samples of 96-Layer 3D Flash

Western Digital Corp. (WD) and Toshiba have separately announced the successful development of 96-layer, 4-bit-per-cell (aka quad-level cell or QLC), 3D NAND Flash memory. Dubbed BiCS4, the new chip can store up to 1.33 terabits (Tb) of data in a single die, which may then be stacked into a 16-layer architecture, allowing for a maximum of 2.66 TB raw storage capacity in a single package.

According to Toshiba's press release, the company "will start to deliver samples to SSD and SSD controller manufacturers for evaluation from the beginning of September." A "packaged prototype" will be shown at the Flash Memory Summit in Santa Clara, California, between August 6 and 9. In addition, the Japanese firm says it will start volume shipments in 2019; potential usage scenarios include SNS, IoT, and data analysis.

WD for its part plans to bring the BiCS4 technology to a wide variety of products, starting with its SanDisk consumer brand later this calendar year as per its own announcement. Dr. Siva Sivaram, Executive VP Silicon Technology and Manufacturing at WD, touts the new product's expected advantages as follows: "BiCS4 QLC is our second generation four-bits-per-cell device, and it builds on the learnings from our QLC implementation in 64-layer BiCS3. With the best intrinsic cost structure of any NAND product, BiCS4 underscores our strengths in developing flash innovations that allow our customers' data to thrive across retail, mobile, embedded, client and enterprise environments. We expect the four-bits-per-cell technology will find mainstream use in all these applications."


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